Power Management IP for Samsung

Compare 12 Power Management IP for Samsung from 5 vendors (1 - 10)

Low Power BandGap
- The agileREF_LP consists of: A bandgap reference core; A bandgap reference voltage generator (VREF) (Reference current outputs allow for remote reconstruction of an accurate reference voltage.) Bias current generators (IBIAS) (Temperature independent bias current generators)
30mA 2-channel LDO voltage regulator (output voltage each channel 1.0V)
- Samsung 28nm FD-SOI
- 1.8V analog input voltage
- 1.0V digital input voltage
3.3V to 1.0V, 3.0A Step-down DC-DC converter
- Supply voltage: 3.3V analog and 1.0V digital
- Adjustable output voltage with trimming: 0.8V÷1.15V (1.0V typical)
- Maximum output current up to 3A
3.3V to 1.8V, 0.7A Step-down DC-DC converter
- Supply voltage: 3.3V analog and 1.0V digital
- Adjustable output voltage with trimming: 1.75V÷2.05V (1.8V typical)
- Output current 0.7A
- Soft start mode
Scalable, On-Die Voltage Regulation
- Droop and DFS/DVFS response profile
- Programmable droop and DFS/DVFS response rate
Power-On-Reset IP
- Area: 0.0106mm2 (49um * 216um)
- Low power: 21uA current consumption
- 1.8V supply for analog and 0.75V supply for digital
- Built-in low power bandgap reference
Low-power Power-On-reset design in Samsung Foundries 65nm LFR6LP process
- Low-power power-on-reset solution for power-critical IoT applications (50 nA operating current)
Low-power capacitor-less LDO designed in Samsung Foundries LF6RLP process
- Low BoM, no external capacitor required
- Low shutdown current to ensure low power power consumption in sleep mode when the LDO is turned off
- Three modes : operation, IDLE and STOP1 to enable various power modes at SoC-level
Low-power capacitor-less LDO with embedded voltage reference designed in Samsung Foundries LF6RLP process
- Low BoM, no external capacitor required
- Low shutdown current (40 nA) to ensure low power power consumption in sleep mode when the LDO is turned off
- Three modes : operation, IDLE and STOP1 to enable various power modes at SoC-level
Combined Power-On-Reset and Low-voltage detection in Samsung Foundries 65nm LFR6LP
- Low-voltage monitoring solution for power-critical IoT applications
- The POR-LVD-[1.8-5.5]-[0.9-1.4].01 includes a Power-On-Reset used to monitor AVD and VDD supplies and to generate information to the SoC regarding the proper establishment of these AVD and VDD supplies.
- The detection threshold for VDD is fixed while the threshold for AVD monitoring is programmable. For a SoC in an ultra-low power mode, the circuits allowing a programmable threshold monitoring of AVD can be de-activated to reduce current consumption.