xHCI Verification IP

Overview

The xHCI Verification IP targets the following three vendors:
1. xHC Driver developers,
2. xHCI IP developers (the xHCI VIP act as xHCD and xHCI Monitor),
3. USB3 device developers(By using existing PL/LL with the xHCI).

The xHCI VIP minimize the complexity and efforts needed for above vendors. This VIP is a light weight VIP with easy plug-and-play interface so that there is no hit on the design time and the simulation time.

Key Features

Compliant with xHCI 1.1, USB3.1, USB3.0, USB2.0 (including errata) and PIPE specifications 3.0, UTMI+ 1.1, ULPI 1.1 specifications.
Full support for backward compatibility (HS/FS/LS).
Flexible user interface : AHB/AXI/PCIe with configurable Data width (32,64,128).
Supports upto 64 device slots, 2 downstream ports and upto 4 interrupters.
Configurable Device slots, interrupters and Number of Ports.
Supports all xhci register sets.
Supports xHCI extended capability registers.
Supports all commands including optional three optional commands.
Supports all USB 3.0 transfer types - Control, Bulk (including Stream with HID), Interrupt, Isochronous (including Smart Isoch) upto maximum burst size.
Supports all USB 2.0 transfer types – Bulk, Control, Isochronous, Interrupt (including HS split transfers).
Supports USB3.0 and USB2.0 power management.
Supports optional debug capability.
Supports loopback for Debug.
Supports dynamically configurable modes.
Strong Protocol Monitor with real time exhaustive programmable checks.
Supports Dynamic as well as Static Error Injection scenarios.
On the fly protocol checking using protocol check functions, static and dynamic assertion.
Built in Coverage analysis.
Graphical analyser to show transactions for easy debugging.

Benefits

Available in native SystemVerilog (UVM/OVM/VMM) and Verilog
Unique development methodology to ensure highest level of quality
Availability of Compliance and Regression Test Suites
24x5 customer support
Unique and customizable licensing models
Exhaustive set of assertions and cover points with connectivity example for all the components
Consistency of interface, installation, operation and documentation across all our VIPs
Provide complete solution and easy integration in IP and SoC environment

Block Diagram

Deliverables

xHCD Agent
xHCD
xHCI Monitor and Scoreboard
Test Environment & Test Suite :
- Basic xHCI Specific Tests
- Directed & Random Tests
- Assertions & Cover Point Tests
- Error Injection Tests
- Protocol Conformance Tests
Integration Guide, User Manual and Release Notes

Technical Specifications

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