Video Decoder Processor IP

Overview

Key Features

• Support Video Decoding formats:
• Unified architecture supports multiple formats
• AV1 main profile
• HEVC main10, main, and main still profiles
• H.264 up to constraint high10 profile
• VP9 profile 0 and profile 2 (10-bit)
• AVS3.0 main-10 bit profile
• AVS2.0 main/main10 profile
• JPEG
• Legacy formats: MPEG4, MPEG2, MPEG1, VC-1, H.263, VP8,VP7, VP6, RV10, RV9, RV8, AVS, AVS+, Sorenson, DIVX3/4/5/6,WebP
• High Performance and throughput
• Up to 8K@30fps performance with a single-core
• Up to 8K@120fps with multiple cores
• Up to 800 cycles BUS latency tolerance without performance impact
• Up to 256 streams in a single device
• Maximally offloads the system CPU
• Leading in PPA/Die Area for high performance solution
• Versatile inline post processing
• Bandwidth efficient solution by inline processing
• Multiple post processing outputs with different algorithm and formats
• High quality downscaling and programmable scaling kernel
• RGB formats for AI models
• Features for different application requirements
• Error concealment and robustness
• DDR efficiency and bandwidth saving
• Low-latency decoding
• Security solution support
• Flexible HW configuration
• HW configuration can be done for most video formats
• Typical 1-4 cores or more in a device
• PP different channels can have different features and restriction
• Data caching and burst shaping for the best DDR efficiency in specific system
• Bandwidth saving by reference frame & output frame compression
• Optional MMU and encryption

Block Diagram

Technical Specifications