VeriSilicon GSMC 0.18um General Process, Low Power circuit design, Diffusion ROM
Overview
VeriSilicon GSMC 0.18um Synchronous Low Power Diffusion ROM compiler optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.18um Logic/Analog 1P6M Industry Baseline Generic (IBG) 1.8/3.3V process can flexibly generate memory blocks via a friendly GUI or shell commands. The compiler supports a comprehensive range of word length and bit length. While satisfying Low Power and speed requirements, it has been optimized for area efficiency. VeriSilicon GSMC 0.18?m Synchronous Low Power Diffusion ROM compiler uses four metal layers within the blocks and supports metal 4, 5 or 6 as the top metal. Dummy bit cells are synthesized in with the intention to enhance reliability.
Key Features
- Low Power
- High Density
- Size Sensitive Self-time Delay for Fast Access and "Zero" Hold Time
- Automatic Power Down
Technical Specifications
Foundry, Node
VeriSilicon GSMC 0.18um
Maturity
Pre-Silicon
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