USB2.0 OTG

Overview

LTTS USB 2.0 OTG controller are designed for compliance with USB2.0 specification Revision 2.0 and all associated ECN’s and USB OTG EH 2 Revision 1.1a and all associated ECN’s. While operating in Host mode, based on configuration selected, optionally, it is compliant with either xHCI, EHCI/OHCI enabling standard Windows, Linux, Android drivers to be reused minimizing software development overheads and associated risks involved with custom bare metal driver solutions. Its Physical interface is compliant with either ULPI+ or 8/16 bits UTMI PLUS Level3 specification. The system interface is compliant with either AHB and/or AXI interface allowing easy integration. Optional custom bridges can be bundled as a service offering. Additionally, while operating in host mode, LTTS USB 2.0 OTG controller can be configured to support either one device connected directly to its port, or multiple devices connected via hubs.

Key Features

  • LTTS USB 2.0 OTG Controller can be configured to support all types of USB transfers – Bulk, Interrupt and Isochronous. While operating in Device Mode it can be dynamically configured to support configurable number of endpoints, interfaces, alternate interfaces and configurations.
  • LTTS USB 2.0 OTG Controller can be configured to support any combinations of USB 2.0 interface speeds – LS(1.5 Mbps), FS (12.0 Mbps), HS (480 Mbps). Eg combinations are LS Only, FS Only, HS Only, LS and FS Only, FS and HS Only etc.
  • LTTS USB 2.0 OTG Controller has full support for all low power features of the USB Specification supporting Suspend, Remote Wakeup and Link Power Management states – L1, L2.
  • LTTS USB 2.0 OTG controller has full support for all test modes features which is required for obtaining USB-IF certification.
  • LTTS USB 2.0 OTG Controller has full support for OTG features such as SRP, HNP and ADP along with software configurable options to turn on/off these features.
  • LTTS USB Controllers have been Silicon Proven in wide range of products such as Graphics Controller, Flash Storage Controllers, SATA Bridges with support for Bulk Streaming, Embedded Hosts, Docking Stations, Mobile Application Processors, Smart TV, Hubs.
  • Compliance
  • LTTS USB OTG Controller IP core is compatible with USB2.0 specification Revision 2.0 and all associated ECN’s.
  • LTTS USB OTG Controller IP core with USB OTG EH 2 Revision 1.1a and all associated ECN’s.
  • LTTS USB OTG Controller IP core operating in host mode is optionally compliant with xHCI specification version 1.1.
  • LTTS USB OTG Controller IP core operating in host mode is optionally compliant with EHCI specification version 1.0
  • LTTS USB OTG Controller IP core operating in host mode is optionally compliant with OHCI specification version 1.0a.

Benefits

  • Support for managing configurable number of endpoints for device mode.
  • Hardware configurable support for all optional features – viz., SRP/RSP/HNP support
  • Hardware configurable support for USB speeds – HS/FS/LS.
  • Hardware configurable support for different use cases:
  • Optional simple slave mode operation for initiating/completing USB transactions for an area optimized implementation. Can be used for both host and device mode.
  • Optional standard based DMA engine based on either xHCI, EHCI, OHCI while operating in host mode allowing standard drivers to be reused. For device mode uses LTTS proprietary DMA controller is used.
  • Optional proprietary LTTS DMA engine for initiating/completing USB transactions limiting software overhead. Can be used with Host and Device mode operation.
  • Feature Rich
  • Internal data path width: 32/64 bits
  • External data path width: 32 / 64 bits
  • USB2 PHY Interface: ULPI, 8/16 bits UTMI PLUS Level3
  • Efficient buffering scheme.
  • DMA path Interface: AHB/AXI
  • Register Path Interface: AHB

Deliverables

  • Configurable RTL Code
  • HDL based test bench and behavioral models
  • Test cases
  • Protocol checkers, bus watchers and performance monitors
  • Configurable synthesis shell
  • Documentation
  • Design Guide
  • Verification Guide
  • Synthesis Guide
  • FPGA Platform for Pre-Tape-out Validation
  • Reference Firmware

Technical Specifications

Maturity
FPGA validated
Availability
Now
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Semiconductor IP