The Synopsys SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum. The USB 3.2 IP offering includes controllers, PHYs with support for the USB Type-C™ connectivity specification, verification IP, and IP subsystems. These elements enable quick development of advanced chip designs incorporating the 20 Gbps SuperSpeed USB standard.
The Synopsys USB 3.2 IP is targeted for integration into SoCs for mass storage devices, display and docking applications, cloud computing, and automotive applications. The Synopsys USB 3.2 Controller and PHY IP allow designers
to maximize power efficiency for extended battery life. The Synopsys USB
3.2 IP enables the fastest USB data transfer speeds while lowering overall power consumption.
As the leading supplier of USB IP, Synopsys provides designers with a high- performance, low-power, and area-efficient IP solution, for cost-effective integration into system-on-chip designs. Synopsys’ expertise in developing and supporting USB enables us to build a low risk, high quality SuperSpeed USB IP solution.
USB 3.2 Controller IP
Overview
Key Features
- Lowest risk: Based on proven USB 3.2 controller shipped in millions of units
- Lowest power: Extend battery life in mobile devices (USB power saving modes, Uniform Power Format, hibernation option with dual power rails)
- Configurable data buffering options to optimize performance vs area
- Supports all USB speed modes
- Device controllers meet the needs for all markets
Benefits
- Supports SuperSpeed USB 3.2 Gen 1 at 5Gbps, USB 3.2 Gen 2 at 10Gbps, and USB 3.2 Gen 2x2 at 20Gbps
- Supports Hi-Speed 480 Mbps and Full Speed 12 Mbps
- Multi-lane operation for USB 3.2 peripherals
- Backwards compatible with all existing USB products
- Optimized Device controller IP designed to achieve power boost
- Synopsys USB 3.2 PHYs and controllers offer high-performance throughput
- Supports PIPE and UTMI+ PHY interfaces
- Architectural features reduce power consumption
Applications
- Mass storage devices
- Display and docking applications
- Cloud computing
- Automotive applications
Deliverables
- Synopsys coreConsultant tool
- Verilog RTL source code
- ASIC and FPGA synthesis, ATPG, DFT, power scripts
- UVM Testbench in Packaged Verification Environment (PVE)
- Comprehensive databook and integration guides
- Compatible with open source drivers at kernel.org
Technical Specifications
Maturity
Available on request
Availability
Available