PSI5 IP Core Controller for Peripheral Sensor Interface 5 Communication

Overview

The DPIS5 is a hardware implementation of a controller for the Peripheral Sensor Interface (PSI5) protocol. This controller complies with the PSI5 protocol specification V2.3 and is designed for use in electronic control units (ECUs) to ensure communication with up to six sensors.

Data transmission from the sensor to the ECU is achieved through current modulation on the power supply line, with a data rate of 125 kbit/s or 189 kbit/s, using a Manchester decoder. Data transmission from the ECU to the sensor is performed via voltage modulation on the power supply.

The DPIS5 supports operation in asynchronous or synchronous mode and accommodates a wide range of sensor data word lengths (8 to 28 bits). It also provides message verification using either a CRC checksum or bit parity.

Key Features

  • Supports bidirectional communication between ECU-to-sensor
  • Asynchronous or synchronous operation
  • Manchester decoder digital data transmission
  • Data transmission speed 125Kbit/s or 189 Kbit/s
  • Support up to 6 time slots between SYNC pulses
  • Configurable data word length from 8 to 28 bits
  • Configurable type of frame checking each slot
  • CRC or parity checking
  • 24 bits time stamp
  • Configurable RX FIFO
  • Fully synthesizable
  • Static synchronous design with positive edge clocking and synchronous reset
  • Scan test ready
  • Available system interface wrappers:
    • AMBA – APB / AHB / AXI Lite Bus
    • Altera Avalon Bus
    • Xilinx OPB Bus

Applications

  • Airbag Systems
  • Chassis & Powertrain Monitoring
  • Industrial Automation

Deliverables

  • HDL Source Code
  • Testbench environment
    • Automatic Simulation macros
    • Tests with reference responses
  • Synthesis scripts
  • Technical documentation
  • 12 months of technical support

Technical Specifications

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