USB 1.1 PHY
Overview
The USB1.1 PHY is an IP version of USB transceiver. It receives data with DP and DM, and transfers data to USB1.1 core with RCV, VM and VP. It is designed in standard logic to interface with the physical layer of Universal Serial Bus. It is capable of transmitting and receiving serial data at either full speed (12M bit/s) or low speed (1.5M bit/s) data rate. The serial interface engine (SIE) controls the state of USB1.1 PHY through the OEN signal. When in receiving mode, it receives data at the output RCV, VM and VP of USB1.1 PHY; when in transmitting mode, it drives the input VPO and VMO of USB1.1 PHY. This IP is of DUP IO version.
Key Features
- Complies with the USB1.1 standard
- SMIC 0.18um, 1.8v/3.3v power supply, 1P6M logic process
- Uses digital input/output to transmit or receive USB cable data
- Supports 12Mbit/s full speed and 1.5Mbit/s low speed serial data transmission
- Supports single-ended data interface
- Level shift is built in
- Built in 1.5K pull-up and 15K pull-down resistors, with selectable connection to DP or DM
- More details, pleas go to below website to contact VeriSilicon location sales:http://www.verisilicon.com/en/contactus.asp
Technical Specifications
Foundry, Node
USB 1.1 PHY