UMC 55nm uLP LowK Logic Process Ture 3.3V Low Power Low Frequency OSC IO Cell Library
Overview
UMC 55nm uLP LowK Logic Process Ture 3.3V Low Power Low Frequency OSC IO Cell Library
Technical Specifications
Short description
UMC 55nm uLP LowK Logic Process Ture 3.3V Low Power Low Frequency OSC IO Cell Library
Vendor
Vendor Name
Foundry, Node
UMC 55nm
Maturity
Silicon proven, Formal release
UMC
Pre-Silicon:
55nm
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