UMC 55nm Logic process standard synchronous Contact ROM memory compiler.
Overview
UMC 55nm Logic process standard synchronous Contact ROM memory compiler.
Technical Specifications
Foundry, Node
UMC 55nm
UMC
Pre-Silicon:
55nm
Related IPs
- 180nm MTP Non Volatile Memory for Standard CMOS Logic Process
- 55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
- SMIC 0.13um Low Leakage UHD RVT_x005F_x000D_ Logic standard cell library, compatible with E-Flash and EEPROM process.
- High performance 8-bit micro-controller with 256 bytes on-chip Data RAM, three 16-bit timer/counters, and two 16-bit dptr; 0.25um UMC Logic process.
- LPDDR3-PHY Command/address block for LightCo ; UMC 40nm LP/RVT Logic Process
- 40nm LPDDR3-PHY Data block for LightCo ; UMC 40nm LP/LVT Logic Process