UMC 28nm HPM/RVT Logic Process 12-track generic_core library with LMINUS (C31)
Overview
UMC 28nm HPM/RVT Logic Process 12-track generic_core library with LMINUS (C31)
Technical Specifications
Foundry, Node
UMC 28nm
Maturity
Silicon proven, Formal release
UMC
Pre-Silicon:
28nm
HLP
,
28nm
HPC
,
28nm
HPM
,
28nm
LP
Related IPs
- UMC 28nm HPM/HVT Logic Process 12-track generic_core library with LMINUS (C30)
- UMC 28nm HPM/LVT Logic Process 12-track generic cell library with LMINUS (C-31)
- UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 RVT)
- Single Port SRAM Compiler IP, UMC 65nm SP process
- CSMC13V33 process DUPIO, This library includes analog I/O cells and digital I/O cells and supports Inline DUP I/O pad.
- High performance 8-bit micro-controller with 256 bytes on-chip Data RAM, three 16-bit timer/counters, and two 16-bit dptr; 0.25um UMC Logic process.