UFS 3.1 Silicon Proven 2.1 HOST
Key Features
- Compliant with UFS Specification v2.x, 3.x
- Supports up to 2-lanes (restricted by Standard) running at HS-G3 (5.8Gbps)
- AXI Support
- All UPIU Processing
- Datain, Dataout, Command, Response, RTT, Query, Task Management and Reject
- Complete control of UIC Layer by UFS Host
- Error Reporting and Handling Supported
- Priority arbitration between command, query and task management UPIUs and Indexed based processing within Command and Query UPIUs.
- Supports 32 UTP Transfer request descriptors and 8 UTP Task Management Descriptors for UFS host
- Supports Boot LUN, RPMB Well-known LUNs.
- Device: Up to 8 LUNs configurable. Up to 8 command queue in each LUN. Up to 8 tasks handling for task management.
- Priority LUN handling.
- Security Features
Block Diagram
Technical Specifications
Short description
UFS 3.1 Silicon Proven 2.1 HOST
Vendor
Vendor Name
Maturity
Silicon Proven, FPGA Validated, Interop Tested, Design verified
Availability
Immediately
Related IPs
- UFS 3.1 Silicon Proven 2.1 Device, Host
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- UFS 3.1 host