Standard Cell (Generic) Library IP, HVT, 8 tracks, UMC 65nm SP process
Overview
UMC 65nm SP/HVT Low-K process Generic Core Cell Library.
Technical Specifications
Short description
Standard Cell (Generic) Library IP, HVT, 8 tracks, UMC 65nm SP process
Vendor
Vendor Name
Foundry, Node
UMC 65nm SP
UMC
Pre-Silicon:
65nm
SP
Related IPs
- Single Port SRAM Compiler IP, UMC 65nm SP process
- Standard Cell PowerSlash(TM) Library IP, HVT, 8 tracks, UMC 55nm SP process
- CSMC 0.13um 9track HVT Standard Cell Library, 1.2v operating voltage
- Standard Cell (MiniLib) Library IP, HVT, 8 tracks, UMC 55nm SP process
- Standard Cell (MiniLib) Library IP, HVT, 7 tracks, UMC 55nm SP process
- Standard Cell (Ultra High Speed) Library IP, HVT, 12 tracks, UMC 55nm SP process