Standard Cell (Ultra High Speed) Library IP, HVT, 12 tracks, UMC 55nm SP process
Overview
UMC 55nm SP/HVT Low-K Logic process UHS Cell Library.
Technical Specifications
Short description
Standard Cell (Ultra High Speed) Library IP, HVT, 12 tracks, UMC 55nm SP process
Vendor
Vendor Name
Foundry, Node
UMC 55nm SP
UMC
Pre-Silicon:
55nm
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