SMIC 65nm 24Bit Sigma-Delta

Overview

The S65LLV25_DAC_01 specifies the design of a high-performance 24-bit stereo Audio DAC for portable digital audio systems. The DAC within the specification uses sigma-delta technique. The output analog signals of S65LLV25_DAC_01 including stereo output are single-ended. The internal stereo headphone amplifier is capable of driving 16Ω load.

Key Features

  • Single-ended DAC
  • --LineOut THDN: -91dB@-6dBFS
  • --LineOut Dynamic Range, SNR: 102dB
  • Audio Serial Interface:
  • --32bit word length
  • --I2S mode
  • 2-wire Serial Control Interface
  • Master Clock is 256fs
  • Sampling Rates:
  • --8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz, 96kHz
  • Power Supply:
  • --1.2V Core Digital Supply typ. (1.08~1.32V)
  • --2.5V Pad and Analog Supply typ. (2.25-2.75V)
  • Highly Efficient Linear Headphone Amplifier
  • Internal PLL as the Audio DAC’s master clock generator
  • Output Mux to bypass FM/Sidetone signal to output
  • Out-PGA: 0dB~-60dB, -2dB per step with analog Mute

Technical Specifications

Foundry, Node
SMIC 65nm
SMIC
Pre-Silicon: 65nm LL
×
Semiconductor IP