SMIC 0.18um LL IO Library
Overview
SMIC 0.18um LL process 1.8v/3.3v Generic IO library
Key Features
- SMIC 0.18um LL Logic 1P6M Salicide 1.8V/3.3V Process.
- 3.3V I/O, 1.8V Core, 5V Tolerant.
- Both Inline and Stagger Compatible IO Pads.
- Configurable Input-Output and Skew Rate Control.
- Robust ESD (>2000V) and Latch-up Immunity (+/-200 mA).
Technical Specifications
Foundry, Node
SMIC 0.18um
Maturity
Silicon Proven
SMIC
Pre-Silicon:
180nm
EEPROM
,
180nm
G
,
180nm
LL
Silicon Proven: 180nm LL
Silicon Proven: 180nm LL
Related IPs
- DDR2/DDR3/DDR3L/LPDDR/LPDDR2/LPDDR3 6 in one combo IO with auto calibration - 40nm LL
- SMIC 0.18um LL 5v IO Library
- GSMC 0.18um Low Power 9track Standard Cell Library, 1.8v operating voltage
- GSMC 0.18um 3.3V Standard Cell Library, 3.3v operating voltage
- GSMC 0.18um Ultra Low Leakage 9track Standard Cell Library, 1.8v operating voltage
- UMC 0.18um 9track Standard Cell Library, 1.8v operating voltage