Simulation VIP for MIPI M-PHY

Overview

In production since 2011 on dozens of production designs.

Incorporating the latest protocol updates, the mature, highly capable Cadence® Verification IP (VIP) for the MIPI® M-PHYsm Protocol provides a complete bus functional model (BFM), integrated automatic protocol checks, coverage model, and compliance tests. It includes highly configurable and flexible simulation models of all the protocol layers, devices, and transaction types.

Supported Specification: MIPI M-PHY specification v4.0, v4.1, and v5.0.

Key Features

  • Specification Compliance
    • Complies with MIPI M-PHY 4.0, 4.1 and 5.0 specification
  • M-PHY Type 1 and Type 2
    • Supports Type 1 and Type 2
  • M-PHY Interface
    • Supports serial interface (DpDn) and signaling interface (RMMI)
  • M-PHY Modes
    • Supports Burst state, ACTIVATED SAVE states (SLEEP and STALL), and hibernate (“HIBERN8”) state
  • M-PHY Transmission Modes
    • Supports multiple transmission modes with different bit-signaling and clocking schemes
    • Supports multiple transmission speed ranges (PWM G1-G7, HS G1 - HS G5) and rates per BURST mode
  • Multi-Lane
    • Supports distribution and merging data over one to four lanes, also supports a different number of lanes per sub-link (direction)
  • Test Mode
    • Support for test mode functionality including loop-back mode
  • CDR
    • Supports Clock Data Recovery

Block Diagram

Simulation VIP for MIPI M-PHY Block Diagram

Technical Specifications

Short description
Simulation VIP for MIPI M-PHY
Vendor
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Semiconductor IP