Cadence provides a mature and comprehensive Verification IP (VIP) for the Advanced Peripheral Bus (APB) specification, which is part of the Arm® AMBA® family of protocols. Incorporating the latest protocol updates, the Cadence® Verification IP for APB provides a complete bus functional model (BFM), integrated automatic protocol checks, and coverage model. Designed for easy integration in testbenches at IP, system-on-chip (SoC), and system levels, the VIP for APB helps you reduce time to test, accelerate verification closure, and ensure end-product quality. Cadence provides a solution for interconnect verification that verifies the correctness and completeness of data. The VIP is compatible with the industry-standard Universal Verification Methodology (UVM) and runs on all leading simulators.
Supported specifications: AMBA 2 APB, AMBA 3 APB, AMBA 4 APB, AMBA 5 APB issue D and E.
