Serial Front Panel Data Port (SFPDP) Verification IP

Overview

Serial Front Panel Data Port (SFPDP) is a high-speed low-latency data-streaming serial communications protocol for use in high-speed real-time data transfer applications. Serial Front Panel Data Port (SFPDP) is fully compliant with standard Serial Front Panel Data Port (SFPDP) specification (AV17DOT1) and provides the following features.

Serial Front Panel Data Port (SFPDP) Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

Serial Front Panel Data Port (SFPDP) Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key Features

Compliant with Serial Front Panel Data Port (SFPDP) Specification AV17DOT1 standard.
Complete Serial Front Panel Data Port (SFPDP) TX/RX functionality.
Supports following interfaces
- 1 bit (serial) and 8,10 bit (parallel)
- 8B/10B Encoder/Decoder interface
- 32 bit Dword Primitive interface
- Complete Frame transaction level interface
Supports link speeds upto 10.0Gbaud with speed negotiation.
Supports different data rates.
Supports all the three fiber frame types
- Normal data fiber frame
- Sync without data fiber frame
- Sync with data fiber frame
Supports the following types of error insertion and detection
- Invalid frame fields
- Invalid EOF and SOF
- Oversize and undersize frames
- Disparity errors
- Invalid K and D character error
- Invalid command error
- CRC error
Monitors, detects and notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
Supports constraints Randomization.
Status counters for various events on bus.
Callbacks in Transmitter, Receiver and Monitor for user processing of data.
Serial Front Panel Data Port (SFPDP) Verification IP comes with complete testsuite to test every feature of Serial Front Panel Data Port (SFPDP) specification.
Functional coverage for complete Serial Front Panel Data Port (SFPDP) features.

Benefits

Faster testbench development and more complete verification of Serial Front Panel Data Port (SFPDP) designs.
Easy to use command interface simplifies testbench control and configuration of Initiator and Target.
Simplifies results analysis.
Runs in every major simulation environment.

Block Diagram

Deliverables

Complete regression suite containing all the Serial Front Panel Data Port (SFPDP) testcases.
Examples showing how to connect various components, and usage of Tx, Rx and Monitor.
Detailed documentation of all class, task and function's used in verification env.
Documentation contains User's Guide and Release notes.

Technical Specifications

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