Secure-IC's Securyzr™ SM4-XTS Multi-Booster

Overview

The SM4-XTS Multi-Booster crypto engine includes a generic & scalable implementation of the SM4 algorithm (a block cipher specified by the OSCCA) making the solution ideal for high-end applications (including key, tweak, input and output registers and Galois field multiplier).

This crypto engine targets high-performance applications such as data storage and memory encryption. Thanks to its scalability, it can be tailored to reach the best trade-off between performances, area and technology.

Overview
The SM4-XTS crypto engine is easily portable to ASIC and FPGA. It supports a wide range of applications on various technologies. The unique architecture enables a high level of flexibility. The throughput and features required by a specific application can be taken into account in order to select the most optimal and compact configuration.

For other SM4 solutions, please see dedicated product sheets: SM4 Standard Crypto Engine (SCZ_IP_BA419) and SM4-GCM Multi-Booster (SCZ_IP_BA415).

Key Features

  • ASIC and FPGA
  • High throughput:
    • ASIC: >400 Gbps
    • FPGA: 100 Gbps/s
  • Scalable solution
  • Can be provided with AXI DMA & software
  • Masking option available with excellent protection against SPA & DPA
  • Cipher stealing (optional)
  • Low power feature
  • Straight forward integration with simple FIFO interfaces

Benefits

  • Off-the-shelf, predictable and silicon-proven solution
  • Easy-to-Integrate
  • Unrivaled speed performance
  • Logic footprint optimized to performance requirements and used functionalities
  • Scalable Multi-Core solution enabling best trade-off between area and performance
  • Portable and optimized to ASIC or FPGA technology
  • Upgradeable to new performance requirements or to new generations of ASIC or FPGA technology
  • User-friendly Software API

Block Diagram

Secure-IC's Securyzr™ SM4-XTS Multi-Booster Block Diagram

Applications

  • Encrypted Disk/Data storage
  • External memory encryption

Deliverables

  • Netlist or RTL
  • Scripts for synthesis
  • Self-checking TestBench based on FIPS vectors
  • Datasheet
  • Integration guide

Technical Specifications

Maturity
Silicon proven
Availability
Now
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Semiconductor IP