SDI Verification IP implements the digital transmision systems as specified in Serial-Digital Interface standard for microprocessor-based sensors. SDI Verification IP provides an smart way to verify the SDI standard data transmission and control interfaces between recorder and sensor. The SmartDV's SDI Verification IP is fully compliant with SDI-12 Version 1.4 and provides the following features.
SDI Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
SDI Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.