The SD library provides the driver / receiver cell for SD 3.0 signaling. The library is compliant with the SD Specifications, Part 1, Physical Layer Specification (Revision 3.01, February 18, 2010). It is also compatible with the Embedded Multi-Media Card (eMMC) Electrical Standard (5.1) (JESD84-B51 – February 2015). This library is offered as a supplement to the I/O libraries provided by Aragio Solutions.
SD 3.0 I/O Pad Set
Overview
Deliverables
- Physical abstract in LEF format (.lef)
- Timing models in Synopsys Liberty formats (.lib and .db)
- Calibre compatible LVS netlist in CDL format (.cdl)
- GDSII stream (.gds)
- Behavioral Verilog (.v)
- Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
- Databook (.pdf)
- Library User Guide - ESD Guidelines (.pdf)
Technical Specifications
Foundry, Node
TSMC 16nm
Maturity
Silicon Proven
Availability
Available Now