The DB1892AXI RGB to CCIR 601 / CCIR 656 Encoder interfaces RGB data along with synchronization signals from a LCD Controller (or any LCD display timing & control unit) to a TFT LCD Panel by-way-of a CCIR 601 / CCIR 656 interface.
Figure 1 depicts the system view of the DB1892AXI RGB to CCIR 601 / CCIR 656 Encoder IP Core embedded within an integrated circuit device. The DB1892AXI RGB to CCIR 601 / CCIR 656 Encoder accepts 24-bit RGB data and VSYNC, HSYNC, and DE synchronization signals and converts the RGB & sync signals to the CCIR ITU-R BT.601 & BT.656 standards, for driving a CCIR 601 / CCIR 656 compliant LCD panel.
The DB1892AXI is a system-level IP Core which optional interfaces to the ARM AMBA AXI fabric for programming of internal parameters. The DB1892 is offered with AHB, OCP, PLB, and Avalon fabrics as options, as well as no fabric interface with hard-coding of the video transformation parameters.
The DB1892 interfaces to Digital Blocks’ DB9000 TFT LCD Controller, for a full system solution of transforming Frame Buffer RGB data to CCIR 601 / CCIR 656 standard video.