Reed Solomon Codec (Errors-only)

Key Features

Errors Only Reed-Solomon CODEC using the Berlekamp Massey algorithm for efficient implementation.
Register programmable, fixed or synchronous “on-the-fly” loading for different values of N in a Reed-Solomon (N, N-2T) code. T fixed by synthesis.
Supports shortened codes.
Can be synthesised for any Galois Field, Reed-Solomon code, and correcting power T, with maximum values for N set by synthesis parameters.
Requires one single-port memory with storage for two non-shortened Reed Solomon blocks.
Excellent performance in both FPGA and ASIC implementations.
Supplied as vector matched C++ and VHDL source with synthesis scripts for Synopsys DC Ultra‰ and Synplify Pro“.

Availability

Now