Reed Solomon Codec

Overview

The CMS0013 Reed Solomon Codec provides ultimate flexibility in its operation and build. The design uses the Berlekamp Massey algorithm in order to maximise speed and efficiency.

Synthesis Parameters

Setting up the Reed-Solomon codec is very simple. Firstly, it is necessary to set up the Galois field over which the code will operate using three parameters:

  • gal_bps. Bits per symbol (typically 7 or 8 for communications applications).
  • gal_alpha. Primitive root of the field (usually 2). gal_field_gen_poly. Field Generator Polynomial (e.g. x8+x4+x3+x2+1 is usually used for GF{28}.
  • Once the field is defined, the Reed-Solomon code generating polynomial is configured with the parameters:
  • MAX_RS_T. The maximum number of symbol errors that can be corrected per codeword.
  • J0. The first power of alpha used in the code generator polynomial.

The code polynomial G(x) is then determined by:
G(x) = (1-αJ0) (1-αJ0+1)… (1-αJ0+2*MAX_RS_T-1)
These parameters are set once in a VHDL package and are applicable to the full design. The field and code parameters are set by constants and fixed for a particular implementation of the block.

The remaining synthesis configuration options control the handling of erasures. Soft Erasure mode allows up to 2*T erasures to be corrected at any location. Variable-T mode provides erasure processing based on a pre-defined erasure pattern.

Each codeword contains 2T redundant symbols, allowing 2T items of information to be deduced. Error decoding requires two items of information per error: the location and the value. This allows a codeword with 2T check symbols to correct T errors.

Because the erasure locations are known, erasure decoding only has to deduce one item per erasure (the value). This allows the decoder to correct up to 2T erasures.

Key Features

  • Full errors and erasures Reed-Solomon CODEC using the Berlekamp Massey algorithm for efficient implementation.
  • Can be synthesised for any Galois Field and Reed-Solomon code.
  • Supports shortened codes.
  • Supports Erasure processing as used in DVB-MPE and Variable-T (punctured) modes as used in IEEE 802.16.
  • Variable-T mode allows register programming or synchronous “on-the-fly” loading for different values of N and T in a Reed-Solomon (N, N-2T) code.
  • Full RDY-VALID handshaking on all data interfaces for simple interfacing with maximum throughput.
  • Excellent performance in both FPGA and ASIC implementations.

Block Diagram

Reed Solomon Codec Block Diagram

Technical Specifications

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