Quantum Safe Engine (QSE)
Overview
Quantum Safe Cryptography acceleration to protect data and devices in the quantum computing era
Key Features
- Compliant with FIPS 203 ML-KEM and FIPS 204 ML-DSA draft standards
- Uses CRYSTALS-Kyber and CRYSTALS-Dilithium quantum-resistant algorithms
- Includes SHA-3, SHAKE-128 and SHAKE-256 acceleration
- The embedded QSE CPU combined with Rambus-supplied firmware implements the full FIPS 203/204 protocols
- Can be used stand alone or integrated into higher function security cores
- Offered as standard QSE-IP-86 or as DPA-protected QSE-IP-86-DPA
- Supports ASIC, SoC and FPGA implementations
- Firmware programmable to allow updates with evolving quantum-resistant standards
Deliverables
- Complete Documentation
- Integration guides
- Reference manual
- Application developer guide
- RTL and FW Package
- Verilog RTL for synthesis and simulation
- Standard EDA tool flow scripts and support files
- Verification test bench and test vectors
- SW Package
- Driver Development Kit, including examples