PLL (Frequency Synthesizer) IP, Input: 20MHz - 200MHz, Output: 500MHz - 1GHz, UMC 0.11um HS/FSG process
Overview
Input 20M-200MHz, output 500M-1000MHz, frequency synthesizable PLL, UMC 0.11um HS/FSG Logic process.
Technical Specifications
Foundry, Node
UMC 110nm HS/FSG
UMC
Pre-Silicon:
110nm
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