Pipelined Square Root

Overview

Function y = √x is a fully scalable square-root function with configurable data width. Inputs and outputs are unsigned integers. An n-bit input value will generate an output result with n/2 integer bits and n/2 fraction bits. Very useful in digital processing when the magnitude of a vector or complex signal must be calculated.

Key Features

  • Function f(x) = √x
  • Input values as unsigned integers
  • Output values as unsigned integers
  • N-bit value -> n/2 integer bits, n/2 fraction bits
  • Configurable data width
  • High-speed fully pipelined architecture
  • Optimization mode for speed/area trade off

Benefits

  • Technology independent soft IP Core
  • Suitable for FPGA, SoC and ASIC
  • Supplied as human-readable source code
  • One-time license fee with unlimited use
  • Field tested and market proven
  • Any custom modification on request

Block Diagram

Pipelined Square Root Block Diagram

Applications

  • Fundamental unit in digital processing functions
  • Square root of integers and fixed-point values
  • Magnitude of vectors and complex signals

Deliverables

  • VHDL source-code (or Verilog on request)
  • Simulation test bench
  • Examples and scripts
  • Full pdf datasheet
  • One-to-one technical support
  • One years warranty and maintenance

Technical Specifications

Foundry, Node
All
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Semiconductor IP