PCIe 7.0 Switch

Overview

The PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enables the connection of one upstream port and multiple downstream ports as a fully configurable interface subsystem. It is backward compatible to PCIe 5.0.

How the PCIe 7.0 Switch Works

The PCIe 7.0 Switch is the first embedded PCIe 7.0 switch IP available on the market and enables designers to use fewer PCIe PHYs, saving latency, power consumption and bill-of-material costs. The PCIe switch IP transparently manages upstream-downstream data flow as well as peer-to-peer transfers between downstream ports, delivering the flexibility, scalability and configurability required for connecting multiple devices, including NVMe SSDs.

Key Features

  • Configurable from PCIe 7.0 x8/ PCIe6x16 @1GHz clock down to PCIe 5.0 x1
  • Highly scalable with up to 31 configurable external or embedded endpoints
  • Configurable Egress Buffer for non-blocking output queueing switch performance
  • Flit mode to non-Flit mode conversion
  • Low power optimized
  • Superior performance through a nonblocking architecture
  • Minimized footprint
  • Allows seamless migration from FPGA prototyping design to ASIC/SoC production design with same RTL
  • Reliability demonstrated through stringent verification and validations

Block Diagram

PCIe 7.0 Switch Block Diagram

Deliverables

  • Wizard
  • Switch Development Platform (equivalent to a reference design) with several configurations available
  • Documentation (User Guide)
  • Technical support and maintenance updates

Technical Specifications

Foundry, Node
Any
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Semiconductor IP