PCIe 7.0 Switch
Overview
The Rambus PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enables the connection of one upstream port and multiple downstream ports as a fully configurable interface subsystem. It is backward compatible to PCIe 5.0.
Key Features
- Configurable from PCIe 7.0 x8/ PCIe6x16 @1GHz clock down to PCIe 5.0 x1
- Highly scalable with up to 31 configurable external or embedded endpoints
- Configurable Egress Buffer for non-blocking output queueing switch performance
- Flit mode to non-Flit mode conversion
- Low power optimized
- Superior performance through a nonblocking architecture
- Minimized footprint
- Allows seamless migration from FPGA prototyping design to ASIC/SoC production design with same RTL
- Reliability demonstrated through stringent verification and validation
Deliverables
- Wizard
- Switch Development Platform (equivalent to a reference design) with several configurations available
- Documentation (User Guide)
- Technical support and maintenance updates
Technical Specifications
Foundry, Node
Any
Related IPs
- PCIe 4.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
- PCIe 5.0 Customizable Embedded Multi-port Switch
- PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
- Configurable controllers for PCIe 2.0/1.0 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications
- Configurable controllers for PCIe 3.1 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications
- Configurable controllers for PCIe 4.0 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications