PCI v2.1 Master/Slave controller

Overview

The PCI master/slave controller is fully compliant with PCI Local Bus Specification, Revision 2.3. It has a fully customizable PCI Configuration Space. The controller supports both 32- and 64-bit PCI bus paths. The application interface can be configured as a 32-bit bit as well as a 64-bit interface as per requirements. The IP supports both master and slave operations and PCI power management

Block Diagram

PCI v2.1 Master/Slave controller Block Diagram

Technical Specifications

GLOBALFOUNDRIES
Pre-Silicon: 40nm LP
TSMC
Silicon Proven: 28nm HPC
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Semiconductor IP