Connectivity Solutions With Our NFC Tag IP in 22 nm CMOS
Our state-of-the-art NFC tag IP integrates seamlessly with ISO 14443-A, 14443-B, and 15693 standards. Ideal for both battery-less and battery-operated devices, this technology ensures best-in-class performance and versatility.
Building Blocks of CSEM’s NFC Tag IP
- Analog Front-End
- Energy efficient communication handling (RX, TX and clock recovery, CKR)–Energy harvesting (WPT) to power the system.
- Fully compatible with all three ISO standards with four dedicated pads (two antenna pads, optional VDDR/VSSR)
- Digital Baseband
- Configurable soft IP supporting ISO 14443A, ISO 14443B, or ISO 15693.
- Dual modes: Autonomous mode for independent NFC command handling, and microcontroller mode for streamlined NFC functionality
Technical Specifications
| Parameters | Value |
| Typical Load Capacitance | 2.2 nF |
| Maximum Magnetic Field Strength (peak) with | 10.7 A/m |
| Voltage on ant_p, ant_n | -0.7 V to 1.98 V |
| Input AM Modulation | 7% to 100% |
| Power Consumption* (WPT and Analog Core (RX/TX/CKR)) | 40 µA |
| Data Rate | fc/128 to fc/8 |
| Rectifier Output Supply Level | 0.9 V to 1.98 V |
| LDO Output Supply Level | 0.72 V to 0.88 V, Typ 0.8 V |
| Time Delay Until POR Release (Delay from RF Field Appearance) | up to 200 µs |
| Area Analog Front End Including WPT and Power Management | 123,000 µm² |
| Area Digital Base Band (depending on e.g. protocol Support FIFO size) | 25 kGE |
