P1619/802.1ae (MACSec) GCM/XEX/XTS-AES Core

Overview

General Description LAN security standard IEEE 802.1ae (MACSec) uses AES cipher in the GCM mode, while the disk/tape encryption standard IEEE P1619 uses the XEX/XTS mode. Since GCM and XEX/XTS share some of their basic components, a combo GCM/XEX/XTS core is not much larger than a dedicated core for either of the modes.

The GXM3 core is tuned for mid-performance P1619 and 802.1ae applications at the data rates of 2-3 Gbps and higher. The core contains the base AES core AES1 and is available for immediate licensing.

The design is fully synchronous and available in both source and netlist form.

Key Features

  • Small size: From 60K ASIC gates (at throughput of 18.2 bits per clock)
  • 487 MHz frequency in 90 nm process
  • Easily parallelizable to achieve higher throughputs
  • Completely self-contained: does not require external memory. Includes encryption, decryption, key expansion and data interface
  • Support for Galois Counter Mode Encryption and authentication (GCM) and XTS-AES mode per P1619
  • XEX-AES encryption mode
  • Cipher Text Stealing (CTS) included
  • Flow-through design
  • Test bench provided

Benefits

  • LAN security standard IEEE 802.1ae (MACSec) uses AES cipher in the GCM mode, while the disk/tape encryption standard IEEE P1619 uses the XEX mode. Since GCM and XEX share some of their basic components, a combo GCM/XEX core is not much larger than a dedicated core for either of the modes.

Block Diagram

P1619/802.1ae (MACSec) GCM/XEX/XTS-AES Core Block Diagram

Applications

  • IEEE 802.1ae: LAN switches, routers, NICs
  • IEEE P1619: hard drive and tape encryption, SAN, NAS

Deliverables

  • Synthesizable Verilog RTL source
  • code
  • Verilog testbench (self-checking)
  • Vectors for testbench
  • User Documentation

Technical Specifications

Foundry, Node
TSMC, UMC 0.13
Maturity
Shipping
Availability
Shipping
×
Semiconductor IP