The OTL Verification IP Product is the comprehensive OTL interface protocol validation solution. ITU-T recommendation G.709 annexure C defines OTL interface mechanism by which OTU4 and OTU3 signals can be car ried for short-reach client side applications. OTU4 signals can be carried over 10 parallel lanes, which are formed by bit multiplexing of 20 logical lanes. OTU3 signals can be car ried over 4 parallel lanes.
The recommendation specifies the way in which OTU4 or OTU3 frames are first divided into 1020 groups of 16 bytes and sent on parallel lanes. Before doing that, the trans mitter follows various rules related with lane rotation.
The recommendation also specified the role of receiver, which is responsible for framing, multi- lane alignment and deskews of in coming data before forming OTU4 and OTU3 frames.
OTL Verification IP developed at eInfochips can be used to verify a transmitter or receiver functionality for both OTU4 and OTU3 inter faces. It is developed in System Verilog HVL and using UVM as verification methodology. The use of methodology allows the single VIP instance be configured as either transmitter or receiver thereby easing the work of VIP integration in testbench. This VIP can be configured as per the user requirements and various hooks provided with it allows user to control behaviour of various VIP components completely while testing its own application.
OTL VIP can be used as active, passive or passive only monitor to verify Networking based design having OTL interface in different scenarios.
OTL VIP comprises of following major elements.
- Driver
- Monitor
- Generator : Sequences & Sequencer
- Protocol Checkers
- APIs
- Coverage Capability
- Assertions
- Configuration
- Report Generator
