MSquare offers a silicon-proven ONFI 5.0 PHY IP that supports all modes of the Open NAND Flash Interface (ONFI) 5.0 specification. ONFI is an interface that connects external flash particles (NAND Flash) and internal flash controller (NAND Controller), commonly used in Solid State Drives (SSD) and embedded memory (eMMC) products. To facilitate customer implementation, the MSquare's ONFI 5.0 PHY supports expandable channels and customizable CE/RB Pad Numbers.
ONFI 5.0 PHY IP
Overview
Key Features
- Compliant with ONFI 5.0 specification
- Supports NV-DDR2 mode
- Supports NV-DDR3, NV-LPDDR4, with a maximum rate of 2400MT/s
- Supports PHY Independent TX/RX Training mode
- Supports DFI with 1:1 / 1:2 clock ratio mode
- Supports self-test mode with built-in BIST
- Supports loopback test with built-in PRBS
- Supports ODT programmable and ZQ calibration
- Integrated low-jitter PLL & DLL
Block Diagram
Technical Specifications
Short description
ONFI 5.0 PHY IP
Vendor
Vendor Name
Foundry, Node
12nm
Related IPs
- ONFI 5.0 NAND Fash PHY IP Compliant to JEDEC
- TSMC CLN16FFGL+ HBM PHY IP
- ONFi PHY 4.0 (FPHY+MDLL+SDLL Regulator) (Silicon Proven in TSMC 28HPC+)
- DDR PHY & DDR Controller IP
- Supporting ONFI 5.0, 4.2, 4.1, 4.0 and ONFI 3 - TSMC 12nm 12FFC,FFC+
- Supporting ONFI 6.0, 5.0, 4.2, 4.1, 4.0 and ONFI 3 - TSMC 0.13um LV,LVOD