The NVMe IP core is compliant with NVM Express base specification revision 1.4 that performs memory transfer to or from the NVMe storage like SSDs. The IP core is designed to handle NVMe protocols without the need for external DDR memory via a PCIe interface. It is ideal for applications that require large storage capacity with high performance and is available with flexible vendor-specific PCIe IP to access SSD.
NVMe Host Controller
Overview
Key Features
- Compliant with NVM Express base specification revision 1.4
- Supports SMART, Identify, Shutdown READ, WRITE, Flush commands
- Includes internal RAM as a data buffer without using the external DDR
- Operates with PCIe IP using 4-lane PCIe Gen3 as a physical layer for the SSD
- Uses vendor-specific PCIe root port IP
- Supports single Admin queue and single IO queues
- Supports scalable IO queues depths and Admin queue depths
- Supports NVMe devices with 512 bytes and 4096 bytes sector sizes
- Supports maximum data transfer size of 1Mb per command
- Supports host memory page size of 4Kbytes
- Supports AXI4-Stream interface for the data interface
- Supports AXI4-Lite interface for the control interface
Benefits
- NVMe host controller with AXI control and data path interfaces
- Supports vendor-specific PCIe hard IP
- Supports PCIe soft IP
- Supports Admin and IO queues of queue depth 16
Block Diagram
Applications
- Used as Host for the NVMe solid state drives
- Used in application which requires high data storage with very high performance