NVDIMM-P Memory Model provides an smart way to verify the NVDIMM-P component of a SOC or a ASIC. The SmartDV's NVDIMM-P memory model is fully compliant with standard NVDIMM-P Specification and provides the following features. Better than Denali Memory Models.
NVDIMM-P Memory Model is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
NVDIMM-P Memory Model comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.