Multi-Protocol Crypto Packet Engine, Low Power, Bus Attached

Overview

The EIP-93 is a Multi-Protocol Engine. The EIP-93 is designed to off-load the host processor to improve the speed of protocol operations and reduce power in cost-sensitive networking products, such as: IoT, Access points from low-end to 5G networks, Femtocell, DSL routers, SOHO routers, Cable Modems and VPN Appliances. It offers significant power reduction with low latency because of the relatively high performance compared to a CPU. The EIP-93 supports both IPsec and TLS, which makes it suitable for many applications.

Key Features

  • IPSec (IPv4 and IPv6):
    • Full IPSec packet ESP transforms according to latest RFCs
    • IPSec ESP transport mode,
    • Complete IPSec (IPv4/IPv6) Header/Trailer processing,
    • Insert ESP header for outbound packets, strip and verify ESP header for inbound packets,
    • Anti-replay check,
    • Calculate and insert Integrity Check Value for outbound packets, strip and verify for inbound packets,
    • Append (outbound) / strip and verify (inbound) padding up to 255 bytes.
  • SSLv3.01 / TLSv1.0 / TLSv1.1 / TLSv1.2 / DTLS
    • Packet transforms according to latest RFCs
    • Full header processing
    • All packets are processed autonomous, including length correction based on pad-length.
  • SA (context) records
    • Optimized Security Association format (Context Record).
    • Supports unlimited number of Security Associations.

Benefits

  • High-speed Crypto Packet solution
  • Silicon-proven implementation
  • Fast and easy to integrate into SoCs
  • Flexible layered design
  • Complete range of configurations
  • World-class technical support

Applications

  • SSL
  • TLS
  • DLTS
  • IPsec
  • Communication protocols

Deliverables

  • Documentation
    • Hardware Reference and Programmer Manual
    • Integration Manual
    • Verification Specification
    • Operations Manual
  • Synthesizable Verilog RTL source code
  • Self-checking RTL test bench, including test vectors and expected result vectors
  • Simulation scripts
  • Configuration:
    • EIP-93i
      • Supports IPsec ESP and SRTP
      • 115K gates
    • EIP-93ie
      • adds SHA-224/256 + AES-192/256
      • 135K gates
    • EIP-93is
      • adds SSL/TLS/DTLS + MD5 + ARC4
      • 125K gates
    • EIP-93ies
      • adds SHA-224/256 + AES-192/256 + SSL/TLS/DTLS + MD5 + ARC4
      • 155K gates

Technical Specifications

Foundry, Node
Any
Maturity
Silicon Proven
Availability
Now
TSMC
Silicon Proven: 7nm , 16nm , 28nm , 40nm G
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Semiconductor IP