MIPI Soundwire PHY
Overview
The physical layer block implements all the line-side functions such as NRZI encoding & decoding, bus clash detection, data line buffer enable/disable. The PHY logic controls or detects multi-lane SoundWire IO interfaces. The PHY also supports Clock stop handshake protocol.
Key Features
- Arasan’s MIPI SoundWire® Master PHY Key Features:
- Compliant with MIPI specification for SoundWire V1.2
- Data input buffer
- Data output buffer with programmable drive strength and slew rate control.
- Data bus keeper to maintain the voltage level.
- Decoder to decode the input data
- Clock output buffer
- Clock input buffer
- DLL to double the input clock frequency with 50% duty cycle.
- Capability for both synchronous and self-timed turn off data output.
- One-shot with programmable pulse width for self-timed turn off data output.
- Programmable delay for high-Z to driving data timing.
- 1.8V +/-10% supply for IOs and 0.8V +/-10% supply for core.
- TSMC 12nm FFC process.
- Arasan’s MIPI SoundWire® Slave PHY Key Features:
- Compliant with MIPI specification for SoundWire V1.2
- One clock lane and three data lanes
- Data input buffer
- Data output buffer with programmable drive strength and slew rate control.
- Data bus keeper to maintain the voltage level.
- Decoder to decode the input data
- Clock input buffer
- DLL to double the input clock frequency with 50% duty cycle.
- Capability for both synchronous and self-timed turn off data output.
- One-shot with programmable pulse width for self-timed turn off data output.
- Programmable delay for high-Z to driving data timing.
- 8V +/-10% supply for IOs and 0.8V +/-10% supply for core.
- TSMC 12nm FFC process.
Deliverables
- Digital IP
- Source RTL
- Synthesis scripts
- Controller simulation environment
- User guide
- Verification IP
- Analog IP
- GDSII
- CDL netlist for LVS
- LIB files
- LEF files
- Scan-inserted netlist with test guide
- Behavioral model with verification environment
- DRC and antenna reports
- Design integration guide
- User guide
Technical Specifications
Foundry, Node
TSMC 12nm FFC
TSMC
Pre-Silicon:
12nm