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MIPI DBI Verification IP

Overview

MIPI DBI Verification IP provides an smart way to verify the MIPI DBI bus. The SmartDV's MIPI DBI Verification IP is fully compliant with version 2.0 MIPI Alliance specification and provides the following features.

MIPI DBI Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

MIPI DBI Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key Features

  • Compliant to MIPI DBI v2.0 Specification.
  • Supports Type A, Type B and Type C Interfaces.
  • Supports Type 1, Type 2 and Type 3 Architecture.
  • Supports all types of Display Command Set types
  • Supports Data width of 8, 9 or 16 bits
  • Ablity control timing fine grain
  • Supports all color formats mentioned in specification
  • Supports reading pixel data from text files
  • Error Injection
    • Reserved bit Error
    • Write less number of parameter error
    • Write more number of parameter error
    • Read less number of parameter error
    • Read more number of parameter error
    • Color data error
  • FIFO depth is programmable
  • Callback in BFM and Monitor for wide range of events to help execute user code.
  • Notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
  • Status counters for various events in bus.
  • MIPI DBI Verification IP comes with complete testsuite to test every feature of MIPI DBI specification.
  • Functional coverage for complete MIPI DBI features.

Benefits

  • Faster testbench development and more complete verification of MIPI DBI designs.
  • Easy to use command interface simplifies testbench control and configuration of Host, Display and Monitor
  • Simplifies results analysis.
  • Runs in every major simulation environment.

Block Diagram

MIPI DBI Verification IP Block Diagram

Deliverables

  • Complete regression suite containing all the MIPI DBI testcases.
  • Examples showing how to connect various components, and usage of Host, Display and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

Technical Specifications

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