MIPI D-PHY TRx 28nm
Overview
The MIPI D-PHY IP is a hardmacro PHY for CSI RX or DSI TX. IO pads and ESD structures are included. Extensive built-in self test features such as loopback and scan support. It offers a cost-effective and low-power solution.
Key Features
- Samsung Foundry 5nm low power enhanced (LN28LPP) CMOS device technology
- 1.8V±5%, 1.2V±5%,1V±5% power supply
- Fully supports MIPI D-PHY v1.2 HS/LP/ULPS Tx/Rx (Backward Compatible with previous versions)
- Supports 80-2100Mbps in D-PHY HS mode
- Global operation timing parameters control
Benefits
- Low power consumption, small area
- Supports normal (1V) power
- Support for various lane configurations
- Built-in self-test feature capable of producing and checking PRBS random pattern
- Highly validated structure in various processes
Block Diagram
Applications
- Mobile, Automotive, IoT, DDI, TCON, etc
Deliverables
- FE-Common: MODEL, TB, LEF, LIBERTY, ATPG, SIPI
- BE-Common: CIR, GDS, DRC, LVS, DFMC
- DOC-Common: Datasheet, User Guide, Test Guide, Supplement Guide, PLL Datasheet, PLL Calculator
Technical Specifications
Foundry, Node
Samsung Foundry 28LPP
Maturity
Silicon Proven
Availability
Now
Samsung
Silicon Proven:
28nm
LPP
Related IPs
- MIPI D-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- MIPI D-PHY Rx-Only 4 Lanes in UMC (28nm, 22nm)
- MIPI D-PHY Tx-Only 2 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6)
- MIPI D-PHY Tx-Only 4 Lanes in SMIC (28nm)
- MIPI D-PHY Tx-Only 4 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6)