MIMO Radar Co-processor Engine

Overview

This is a configurable and programmable highly efficient Radar Co-processor engine for high resolution MIMO Radar systems.

It includes a main signal processing engine that sequentially calculates Range, Doppler, Azimuth and Elevation Fourier transforms on multiple ADC channels and detects potential objects for further processing. The small set of retained detections are post processed by associating to tracks and smoothing with a Kalman Filter.

Filtered data associated with each detected object can be made available for processing by an external ML processor

It is ported to both ASIC and FPGA technology and achieving a very high clock speed with minimal logic and memory.

Key Features

  • Provides all processing steps from ADC to object list and point cloud
  • Can process multiple antenna systems with 100s of virtual antennas
  • Uses advanced processing methods such as super resolution - MUSIC, Capon, MinNorm
  • Real time extraction and tracking supporting many hundred of plots
  • Low-latency – track updates in 10s of milliseconds
  • Combined LRR and SRR object tracking
  • Raw object associated with each detected object is available for external AI based processing
  • The processing steps are summarised as follows.
    • Range processing
    • Doppler processing
    • Azimuth processing
    • Elevation processing
    • Kinematics
    • Measurement to track association
    • Kalman Update

Benefits

  • Low latency, low power and compact
  • Gives ECU headroom for track-to-object recognition and make safety decisions
  • EnSilica’s Radar and ASIC experts can provide integration support for FPGA platforms or design and supply custom ASICs

Block Diagram

MIMO Radar Co-processor Engine  Block Diagram

Applications

  • Advanced automotive Radar systems
  • 4D Radar
  • LiDAR and Radar point cloud generation
  • Low-cost corner Radar
  • Security and roadside Radar systems

Deliverables

  • RTL
  • Testbench
  • Synthesis scripts
  • Documentation
  • MATLAB and C++ bit exact model
  • GUI for configuring and visualising the data
  • CUDA accelerated bit exact model

Technical Specifications

Availability
Available Now
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Semiconductor IP