memBrain™ Tile
Key Features
- Multiplication happens through cell operation characteristics
- Summation happens along the word or bit line depending on configuration
- Multiple "Tiles" can be connected to support a large neural system
- Example tile full frame cycle time 10-30 us
- Depends on D-A and A-D power
- Energy is 0.3pJ per MAC with D/A+A/D @ 30 us frame cycle time
- Area with D to A input and A to D output blocks = 0.48 mm^2 on 40 nm (512×512 tile available, other Tiles in development)
Block Diagram
Technical Specifications
Maturity
Available on request