MCU PAD - SMIC 55nm Eflash

Key Features

  • 1.8V/3.3V/1.2V power supply can be used
  • ? Including ultra-low leakage MCU I/O total solution
  • ? Supports 1.2V core voltage power off, and get ultra-low leakage
  • ? Provides a wide variety of interrupt I/O for customers to easily communicate with outside
  • world at low power states
  • ? The powerful level shift structure can help customers use fixed internal I/O voltage, but
  • unfixed power voltage for the outside interface
  • ? All I/O support that the voltage of PAD is higher than I/O power
  • ? Based on SMIC 55nm embedded-flash process, supports 1P7M1TM
  • ? DUP structure to help customer reduce cost
  • ? Standard I/O size is 70um*128um
  • ? Built in power-on-control function to prevent chip latch-up potential risk during chip
  • powering up
  • ? ESD specification
  • HBM …….………………………..………..2KV
  • MM …….……………………..…..………..200V
  • CDM …….……………………..…..………500V
  • Latch Up …………………………………...150mA

Benefits

  • Cost saving compared to eflash technology

Deliverables

  • Technical documents,GDS hard macro to foundry for IP merge

Technical Specifications

Foundry, Node
SMIC 55nm Eflash
Maturity
Silicon proven
Availability
immediate
SMIC
Silicon Proven: 55nm G , 55nm LL
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Semiconductor IP