M’ary Quadrature Amplitude Modulator IP in VHDL, FPGA and SDR

Overview

We present an implementation of Quadrature Amplitude Modulation (QAM) signal modulators using Field Programmable Gate Array (FPGA).

The modulator is targeted at the low-level "RTL based" implementation with the building blocks of the QAM modulator. To provide a flexible way of testing the transmission and modulation properties later in real-time, a higher level hierarchical implementation based on GNURadio was provided to investigate future application of offloading QAM modulation into FPGA, to accelerate the development, testing, and verification of SDR (Software-Defined Radio) application in real-time environment.

Key Features

  • Fully verified and synthesized with source code and netlist, integration guide, license and manual

Benefits

  • Each system module will be presented, and verified with testbenches along with Matlab scripts to verify the functional behavior of the QAM waveform including the constellation diagram and the upconverted passband waveform transition, then with respect to all system components. In this system no target board for implementation has been specified, but it addresses only to the Zynq-7000 FPGA.

Block Diagram

M’ary Quadrature Amplitude Modulator IP  in VHDL, FPGA and SDR Block Diagram

Applications

  • Quadrature modulation for wireless communications.

Deliverables

  • Soft (VHDL codes) as well as firmware IP in form of synthesized netlists
  • Simulation, testing, synthesizing scripts and reports
  • Integration guides and user manual
  • License

Technical Specifications

Maturity
Pre-Silicon
Availability
Soft IP, Netlist IP
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Semiconductor IP