Low Power/Ultra Low Power Dual Port SRAM Compiler with Row/Column Redundancy Option, with write assist, supports process G/LP/LP_eDRAM/ULP/ULPEF
Overview
Memory Compilers
Technical Specifications
Foundry, Node
TSMC 40nm
Maturity
Silicon Proven
TSMC
Silicon Proven:
40nm
G
,
40nm
LP
Related IPs
- Low Power/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with read assist, write assist, supports process G/LP/LP_eDRAM/ULP/ULPEF
- High Performance/Low Power/Ultra Low Power Dual Port SRAM Compiler with Row/Column Redundancy Option, with write assist, supports process HP/HPC/HPC+/HPL/HPM/LP/ULP
- High Performance/Low Power/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with read assist, write assist, supports process HP/HPC/HPC+/HPL/HPM/LP/ULP
- High Performance/Low Power/Ultra Low Power MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, read assist, write assist, supports process HP/HP
- High Performance/Low Power/Ultra Low Power Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, read assist, write assist, supports process HP/
- Low Power/Ultra Low Power MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, read assist, write assist, supports process G/LP/LP_eDRAM/ULP/ULPE