Low power 8bit 300Ksps R2R Compact area High performance Silicon Proven DAC IP Core

Overview

The 8-bit 300 Ksps DAC IP Core employs a high-performance R2R architecture and provides an optional differential current output or differential voltage output. The bandgap and current source are included to provide a complete DAC. The DAC can be configured to adjust full-scale output range and has all the necessary calibration circuitry to provide excellent static and dynamic linearity performance. The DAC uses a proprietary architecture that reduces harmonic and intermodulation distortions at high output frequency and amplitudes. Our data converter (ADC and DAC) IP cores offer sampling rates from a few MSPS to over 20GSPS and resolutions ranging from 6 bits to 14 bits.

Key Features

  • 24bit Resolution
  • Upto 300 Ksps Rate
  • Functional from -40 deg C to 125 deg C
  • Reduces noise and power consumption.
  • Provides accurate charge transfer without the need for calibration.
  • Simplifies high-performance analog designs.

Benefits

  • Excellent linearity
  • Compact area
  • High-performance low power
  • Complete subsystem with:
  • Bandgap reference
  • Support for I/Q and array configurations

Applications

  • General purpose software defined radio.
  • High speed data acquisition systems
  • Cellular base station
  • Broadband communications
  • High-speed medical imaging
  • Wideband satellite receiver
  • Wireline Communication
  • Wireless Communication
  • Low Power IoT

Deliverables

  • CDL netlists
  • Liberty timings
  • Verilog description
  • A full datasheet
  • An integration note.

Technical Specifications

Maturity
In Production
Availability
Immediate
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Semiconductor IP