Low-Power 8-bit SAR ADC - 8 bits, 50kSPS, Low Voltage (1.8V), Low Power (20µA) TowerJazz 0.18 um

Overview

This macro-cell is a low power, general purpose, 8-bit, 50kSPS, Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) core designed for TowerJazz 0.18μm TS18SL CMOS technology.

The circuit has an internal sample-and-hold circuit and a power-down operation mode to save power in applications where power consumption is critical.

Key Features

  • 8-bit resolution, 50kSPSspeed
  • avdd=1.8V, dvdd=1.8V
  • Low power (20µA) inactive mode
  • INL=±0.5 LSB, DNL=±0.5LSB
  • Power down operation mode
  • Indicative area:0.065mm2

Block Diagram

Low-Power 8-bit SAR ADC - 8 bits, 50kSPS, Low Voltage (1.8V), Low Power (20µA) TowerJazz 0.18 um Block Diagram

Technical Specifications

Foundry, Node
TowerJazz 0.18 um
Maturity
Silicon Proven
Tower
Pre-Silicon: 180nm , 180nm , 180nm
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Semiconductor IP