Low-leakage LDO in SMIC 40EF to supply logic and analog domains (up to 5.5V input supply)
Overview
Low-leakage LDO in SMIC 40EF to supply logic and analog domains (up to 5.5V input supply)
Key Features
- Low leakage current for best consumption in sleep mode
- High PSRR to supply analog loads
- Support input supply voltage up to 5.5V
- Programmable output voltage
Technical Specifications
Foundry, Node
SMIC 40nm eFlash
Maturity
Pre-silicon
SMIC
Pre-Silicon:
40nm
LL
Related IPs
- Low-leakage LDO in TSMC 40 ULP to supply logic and analog domains (up to 5.5V input supply)
- Low-leakage LDO for logic and analog domains supply up to 5.5 Vin - High temperature (Grade 1, Tj=150°)
- Low-leakage LDO for logic and analog domains supply up to 5.5 Vin - High temperature (Grade 1, Tj=150°)
- Low-leakage LDO in TSMC 22ULL to supply logic and analog domains (up to 3.63V input supply)
- Low-leakage LDO in TSMC 22ULL to supply logic and analog domains (up to 3.63V input supply)
- LDO linear regulator in TSMC 22ULL to supply logic and analog domains - up to 5.5 V input supply