Load Unload FFT

Overview

FFT IP Core with a minimal memory footprint best suited for ASIC applications.

Key Features

  • Load, process, and unload cycles allow for a single set of data
  • Minimal memory configuration best for least ASIC area
  • 1, 2, or 4 butterfly configurations
  • Optional input buffer for continuous data applications
  • Fixed or floating point math
  • Run-time length and direction selections

Technical Specifications

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Semiconductor IP