General-purpose FFT core

Overview

The FFT is factored into Radix-4 Butterfly operations. When an odd power of two is required, a small radix-2 “follower” stage performs the final iteration. The radix-2 stage does not require a full complex rotator so its cost is minimal.

The Radix-4 Engine fetches one complex word of data each clock cycle. Four interleaved data words are collected then applied to the t0-t3 inputs. On successive clock cycles the engine calculates the four frequency domain outputs f0-f3. These are then stored back into the Working Buffer.

During the final iteration, the engine produces frequency domain outputs on successive clocks. These arrive in scrambled (digit-reversed) order.

A final pass through the data produces outputs in sorted order.

Key Features

  • Typical applications include COFDM modems for 802.11a, 802.16 and DVB-T.
  • Synthesis controls allow FFT sizes = 2n with support for multiple run-time sizes such as 2k/4k/8k modes for DVB-T/H.
  • Performs forward or inverse FFT.
  • Generates cyclic prefix as required by most COFDM standards.
  • I/O structures support both Time Domain (real-time) and Frequency Domain (burst mode) interfaces.
  • Synthesis control of signal precision (variable width).

Block Diagram

General-purpose FFT core Block Diagram

Technical Specifications

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Semiconductor IP